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CDCVF857 - 2.5-V PHASE-LOCKED-LOOP CLOCK DRIVER

Description

The CDCVF857 is a high-performance, low-skew, low-jitter, zero-delay buffer that distributes a differential clock input pair (CLK, CLK) to 10 differential pairs of clock outputs (Y[0:9], Y[0:9]) and one differential pair of feedback clock outputs (FBOUT, FBOUT).

Features

  • Spread-Spectrum Clock Compatible.
  • Operating Frequency: 60 MHz to 220 MHz.
  • Low Jitter (Cycle-Cycle): ±35 ps.
  • Low Static Phase Offset: ±50 ps.
  • Low Jitter (Period): ±30 ps.
  • 1-to-10 Differential Clock Distribution (SSTL2).
  • Best in Class for VOX = VDD/2 ±0.1 V.
  • Operates From Dual 2.6-V or 2.5-V Supplies.
  • Available in a 40-Pin MLF Package, 48-Pin TSSOP Package, 56-Ball MicroStar Junior™ BGA Package.
  • Consumes < 1.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CDCVF857 www.ti.com SCAS047F – MARCH 2003 – REVISED MAY 2007 2.5-V PHASE-LOCKED-LOOP CLOCK DRIVER FEATURES • Spread-Spectrum Clock Compatible • Operating Frequency: 60 MHz to 220 MHz • Low Jitter (Cycle-Cycle): ±35 ps • Low Static Phase Offset: ±50 ps • Low Jitter (Period): ±30 ps • 1-to-10 Differential Clock Distribution (SSTL2) • Best in Class for VOX = VDD/2 ±0.1 V • Operates From Dual 2.6-V or 2.
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